EYYES Deep Learning Accelerator
What is the EYYES Deep Learning Accelerator?
The Deep Learning Accelerator is a hardware acceleration for the computation of deep convolutional neuronal networks, e.g. in embedded systems. The Deep Learning Accelerator is available as virtual IPCore for FPGA Platforms as well as a pysical device. It can be a RTI or a TIC-Box including a video pipeline and other interfaces. In the near future the Deep Learning Accelerator will be available as ASIC.
What is the EYYES Deep Learning Accelerator doing?
The Deep Learning Accelerator calculates the inference/prediction for every layer of the deep neuronal network. Within a single layer input data can be computed in parallel by multiple compute units. It only requires model (a deep neuronal network architecture, parameter, scheduling) binarized by the deep learning optimizer as well as an input image provided by a camera sensor.
Benefit and advantage of the Accelerator
The Deep Learning Accelerator is optimized to scale the model to the used FPGA and the a trade-of between computational power and energy consumption can be choosen. The Deep Learning Accelerator is under constant developtment to be ready for future deep learning functionalities without changing the hardware platform. The most important types of layers and activation functions are already supported today.